Service Portfolio

Hardware Description Language (HDL) Design Expertise with self-developed Interface Soft-IP

• FPGA Design and Synthesis
• Testbench Design and Simulation
• Intel® Nios® II Soft-Core Processor
• Intel® FPGA Memory (SDRAM) Optimization
• Partial Reconfiguration
• HDL Soft-IP Timing Analyzation

Used HDL Design and Verification Tools

• SystemVerilog, VHDL
• Intel® Quartus® Prime
• MentorGraphics® (Siemens® EDA) ModelSim™
• cocotb (for Python-based Testbench Design and Simulation)
• Intel® External Memory Interface Toolkit (for the Intel® Arria® 10 SX)
• TCL- and Python-Scripts (for system verification, build automation,...)
• MathWorks® MATLAB™ (for Simulation input file generation)

Arm®-based SoC FPGA Software Design to fulfill Customer-specific Requirements

• FPGA Project Integration for Arm®-based Application Processor Systems
  • Hard Processor System (HPS/PS) and FPGA I/O Configuration
  • I/O Mapping via the FPGA Interconnect to share I/O between FPGA and Arm®
  • System Memory (SDRAM) Design (DDR3,DDR4) and Configuration
  • Arm® AMBA® AXI Bridge Interface Design between the Arm® Processor System and FPGA
  • Configuration of Hard-IP (e.g. CAN) for FPGA and Arm® usage
• Bootloader Entwicklung
  • Boot Scripts (e.g. for writing the FPGA-Fabric during boot)
  • Various boot sources (e.g. eMMC, QSPI,..)
  • Secure boot and FPGA Partial Reconfiguration (e.g. Intel® Arria® 10 SX Early I/O)
• Embedded Linux Entwicklung
  • Customer-specific Embedded Linux design
  • Linux Kernel Optimization and Verification with Arm® Entwicklung Tools
  • Writing of a Linux Device Tree
  • Board Support Package Design (BSP)
  • Linux Driver Entwicklung for FPGA Soft-IP (e.g. for using Interrupts and DMA)
  • Embedded Linux Application development
  • Linux Configuration- and start-up Script design
  • Network and Web Interface development
• SoC FPGA Automation Design with Scripts to enable for instance:
  • the configuration of Flash Devices of the Hardware during production
  • Software and FPGA Hardware Updates in the Field
  • Customer friendly further Entwicklung of Linux Software and FPGA Design after deployment

Used SoC FPGA Design Tools

• OpenEmbedded Yocto Project
• Intel® Embedded Entwicklung Suite (SoC EDS)
• Arm® Entwicklung Studio (DS-5)
• Arm® Streamline
• HTML5, CSS, JavaScript and Django (for Web Interface Design)
• cmake, C++, gcc, Arm® Assembly, ...

Design of Interfaces between the FPGA Soft-IP, (HPS / PS) Hard-IP on the Hardware and Software side.

• Low Speed Hard-IP (e.g. SPI, CAN,...)
• PCIe Hard-IP for PCIe Root-Complex End-Points (e.g. for FPGA PCIe Accelerator Cards)
• FPGA Transceiver Design (e.g. SFP+ 10Gbit Ethernet Interfaces)
• FPGA and HPS/PS Shared-memory SDRAM (DDR3, DDR4) Design
  with memory Optimization (SDRAM Calibration, SDRAM pre-loading, SDRAM Bank Interleaving, ...)
• Tightly Coupled Memory (TCM) Interfaces
• Soft-IP Interface Entwicklung with Arm® AMBA® AXI or Intel® Avalon® Bus Interfaces

Software Entwicklung to connect the SoC FPGA with the Microsoft® Windows™ Desktop World

• Windows Kernel Mode Driver (KMDF) Entwicklung for PCIe Drivers
• PCIe, Network and USB Interface Design to the Embedded Hardware
• Microsoft® Windows™ high-performance Service development
• Microsoft® Windows™ Desktop Software engineering

Used Tools for Microsoft® Windows™ Entwicklung

• Microsoft® Visual Studio™
• Microsoft® Windows™ Driver Entwicklung Kit (WDK)
• Microsoft® Windows™ Presentation Foundation (.NET C# WPF)
• Microsoft® Windows™ Communication Foundation (.NET WCF) (for Network Interfaces)
• Google® high performance Remote Procedure Call (gRPC) (for Network Interfaces)

Design to process latency and real-time critical Data by using one of the following Concepts:

• Running real-time critical Tasks only in Hardware
• Using a self-contained real-time Microcontroller (MCU) together with Embedded Linux
• Running a real-time OS (RTOS) on a Hypervisor (Arm®v8-A) simultaneously with Embedded Linux
• Writing a Linux Kernel Mode Application (Driver) for pseudo real-time critical Tasks
• Writing a Windows™ Kernel Mode Application (Driver) for pseudo real-time critical Tasks
• Writing a Linux/Windows™ Service for pseudo real-time critical Tasks

Some Tools that can be used:

• Intel® Nios® II Soft-Core Processor (External Interrupt Controller, Shadow Registers,...)
• External Arm®-based Microcontrollers (MCUs)
• Real-time Operating Systems (RTOS) (e.g. FreeRTOS, Arm® CMSIS OS, ChibiOS, Erika (AUTOSAR))

High-level Experience in Hardware and Software with the following Arm®-based Microcontrollers

• STmicroelectronics® STM32 (e.g. stm32F3, stm32F4, stm32F7, stm32L1, stm32L4, stm32H7,...)
• Cypress Semiconductor® (Infineon® AG) PSOC (e.g. PSOC4, PSOC5, PSOC6,...)

Experience in Software with the following Arm®-based Microcontrollers

• Silicon Labs® (e.g. EFN32 Giant Gecko,...)
• Atmel® (Microchip®) SAM (e.g. SAM4E, SAM3S...)
• Nordic Semiconductor® (e.g. nRF52,...)
• Maxim Integrated® (Analog Devices®) (e.g. MAX32670,...)

High-level Experience with NarrowBand-IoT (LTE-NB1) 4G/LTE-based cellular Radio in all Fields

• 4G/LTE Modem Hardware Interface Design (UBLOX® and Quectel®)
• AT-Command Software Modem Interface Entwicklung
• MQTT and CoAP IoT Protocols to connect with the Cloud
• Cloud Interfaces